Research interests
My research interests include hardware implementation of computer arithmetic of various formats : Floating-Point, Fixed-Point or other more exotic formats. I enjoy working on fused operators (that can implement their operation as if done precisely, with only one final rounding).
I am a fan of Flopoco, and both develop for the open-source project and use the framework for industry applications.
During my thesis, I used to work on Floating-Point operators for Kalray's new generation AI and HPC accelerator.
These days, I work on Rocq modelisation of non-standard dot-product operators, in particular the ones implemented in GPUs.
Publications
- Hardware Arithmetic Acceleration for Machine Learning and Scientific Computing, Orégane Desrentes, 2025, Thesis [manuscript]
- Double-Word Decomposition in a Combined FP16, BF16 and FP32 Dot Product Add Operator, Orégane Desrentes, Benoît Dupont de Dinechin, Florent de Dinechin, 2025 32th IEEE International Symposium on Computer Arithmetic (ARITH), 8 pages [hal]
- Activations in Low Precision with High Accuracy, Tom Hubrecht, Orégane Desrentes, Florent de Dinechin HAL, 8 pages [hal]
- Exact Fused Dot Product Add Operators, Orégane Desrentes, Benoît Dupont de Dinechin, Florent de Dinechin, 2023 30th IEEE International Symposium on Computer Arithmetic (ARITH), pages 151-158 [hal | slides]
- Exact Dot Product Accumulate Operators for 8-bit Floating-Point Deep Learning, Orégane Desrentes, Benoît Dupont de Dinechin, Julien Le Maire, 2023 26th Euromicro Conference Series on Digital System Design (DSD), pages 642-649 [hal]
- In-Place Multicore SIMD Fast Fourier Transforms, Benoît Dupont de Dinechin, Julien Hascoët, Orégane Desrentes, 2023 IEEE High Performance Extreme Computing Conference (HPEC), pages 1-6 [hal]
- Using integer linear programming for correctly rounded multipartite architectures, Orégane Desrentes, Florent de Dinechin, 2022 International Conference on Field-Programmable Technology (ICFPT), pages 1-8 [hal]
- A Posit8 decompression operator for deep neural network inference, Orégane Desrentes, Diana Resmerita, Benoît Dupont de Dinechin 2022 Conference on Next Generation Arithmetic, pages 14-30 [hal]
Patents
- Multiplieur d'opérandes à virgule flottante utilisant une décomposition des opérandes en nombres à virgule flottante de plus basse précision, Orégane Desrentes, Benoît Dupont de Dinechin, 2024
- Multiple operand floating point adder with correct rounding, US20250130768A1, Orégane Desrentes, Benoît Dupont de Dinechin, 2023
Presentations
- Numerical error in Floating Point arithmetic, what you should look out for, Orégane Desrentes, CITI PhDDays, April 2024 [slides | demo source]
- Hardware implementation of linear algebra operations for small floating point formats, Orégane Desrentes, AriC Seminar, 27 of June 2024 [slides]