My research interests include hardware implementation of computer arithmetic of various formats : Floating-Point, Fixed-Point or other more exotic formats. I enjoy working on fused operators (that can implement their operation as if done precisely, with only one final rounding).
I am a fan of Flopoco, and both develop for the open-source project and use the framework for industry applications.
I currently work on Floating-Point operators for Kalray's new generation AI and HPC accelerator.
Publications
In-Place Multicore SIMD Fast Fourier Transforms, Benoît Dupont de Dinechin, Julien Hascoët, Orégane Desrentes, 2023 IEEE High Performance Extreme Computing Conference (HPEC), 1-6 [hal]
Exact Dot Product Accumulate Operators for 8-bit Floating-Point Deep Learning, Orégane Desrentes, Benoît Dupont de Dinechin, Julien Le Maire, DSD/SEAA 2023-26th Euromicro Conference Series on Digital System Design [hal]
Exact fused dot product add operators , Orégane Desrentes, Benoît Dupont de Dinechin, Florent de Dinechin, 2023 ARITH-30th IEEE International Symposium on Computer Arithmetic [hal | slides]
Using integer linear programming for correctly rounded multipartite architectures, Orégane Desrentes, Florent de Dinechin, 2022 International Conference on Field-Programmable Technology (ICFPT), 1-8 [hal]
A Posit8 decompression operator for deep neural network inference, Orégane Desrentes, Diana Resmerita, Benoît Dupont de Dinechin Conference on Next Generation Arithmetic, 14-30 2 2022 [hal]
Presentations
Numerical error in Floating Point arithmetic, what you should look out for, Orégane Desrentes, CITI PhDDays, April 2024 [slides | demo source]
Hardware implementation of linear algebra operations for small floating point formats, Orégane Desrentes, AriC Seminar, 27 of June 2024 [slides]